Qualification :

• • B. Tech. and M. Tech.

Specialization :

• • Wireless Communication Network, Mobile Ad hoc Network

Department:

• • Department of Electronics and Telecommunication Engineering

Brief :

Prof. Moresh M. Mukhedkar is a Assistant Professor in Electronics & Telecommunication Engineering department of D. Y. Patil University, Ambi, Pune. He Submitted his Ph.D. Thesis (March 2020) in Electronics Engineering from Ramrao Adik Institute of Technology, under Mumbai University, Mumbai, India. Prior to Ph.D program he graduated from STBCOE, Dr. B. A. M. University, Aurangabad, and did his Masters in Electronics & Telecommunication from SGGS IE&T, S. R. T. M. University, Nanded. He has 14 years of teaching experience and 3 years of Research and industrial experience. Working with DYPCOE since 2008, during this tenure, he has taught the subjects in the domain of Integrated Circuits, Digital Electronics & Logic Design, VLSI Design Technology, Mobile Communication, Electronics Product Design, Research Methodology, Reconfigurable Computing, Embedded System Design, Wireless Sensor Networks etc. His primary research interests include Wireless Ad hoc Networks, MANET, Image Processin, VLSI etc. Over the years he has supervised 24 bachelors projects and 16 masters students. He has published papers in various National / International conferences and journals.

Experience :

• • Total Experience : 16.9

  • Industrial Experience : 3

  • International Experience : 0

  • Academic Experience : 13.9

Achievements/ Recognitions/ Awards :

• • • Secured 3rd Prize at 14th Avishkar Research Convention 2019-20. Mumbai University, • Got 1st prize at National Conference held at DYPSOEA Ambi 2018, • Qualified GATE 2004 in Electronics & Communication subject with 93.17 percentile. • Received Young Researcher Award from IARDO in 2019. • HOD (E&TC) at Dr. D Y Patil College of Engineering, Ambi from 2009 to 2014. • AICTE accreditation process in charge for year 2008-14 for DYPCOE, DYPIET, DYPSOEA, DYPIM, DYPP. • LIC visit coordinator for from 2008 to 2014 & 2017 for DYPCOE, DYPIET, DYPSOEA. • Controller of Examination (SPPU Exams) form 2009 to 2017 for DYPCOE. • Admission process coordinator for year 2010-19 for DYPCOE • DTE’s ARC centre Incharge for DYPCOE • Guided several projects related to the electronic design especially VLSI design during teaching carrier of 14 years in the above mentioned engineering colleges. • Worked as Project Trainee at CEERI Pilani, Rajasthan. • Worked on Project, design of Low cost portable Ultrasongraphic machine as part of M.Tech. E&TC Desertation work at CEERI, Pilani, Rajasthan. • Worked on the Project Real time Security Algorithm using AES for Wireless adhoc network. • PG Recognition of SPPU, Pune (from 2012 to till date)

Professional Memberships :

• • LM ISTE

Research Area :

• • Wireless Communication Network, Mobile Ad hoc Network, Image Processing, VLSI

Subjects:

• • Integrated Circuits, Digital Electronics & Logic Design, Computer Organization, Radar and Microwave Techniques , VLSI Design Technology, Electronics Product Design, Research Methodology, Embedded System Design, Wireless Networks, Wireless Sensor Networks