Qualification :

    • BE, ME, MS CSE (United States of America), Ph D (pursuing)

Specialization :

    • Wireless Networks


    • Department of Electronics and Telecommunication Engineering

Brief :

Prof. Nitin A. Dawande is a Associate Professor in Electronics & Telecommunication Engineering department of D. Y. Patil University Ambi Pune. He is pursuing his Ph.D in Electronics & Telecommunication Engineering from JJT University Rajasthan India . Prior to Ph.D program he graduated from Amravati University Amravati and did his Masters in Electronics from Shivaji University Kolhapur. He also did his MS in Computational Science & Engineering from North Carolina A&T State University USA. He has 28 years of teaching experience and working with DYPCOE since 2011 during this tenure he has taught the subjects in the domain of Electronics Devices & Circuits Digital Electronics & Logic Design Signal & systems Digital Signal Procssing Electromagnetics & Transmission Lines VLSI Design Technology Microcontrollers & Applications Reconfigurable Computing Analog VLSI Design Embedded System Design Wireless Networks Wireless Sensor Networks etc. His primary research interests include Wireless Ad hoc Networks Bioinfromatic genetic sequence analysis Multiresolution Signal Analysis Concateneative speech synthesis Image Inpaining etc. Over the years he has supervised numerous bachelors and masters students. He has published papers in various National / International conferences and journals.

Experience :

    • Total Experience : 28

    • Industrial Experience : Nil

    • International Experience : 2

    • Academic Experience : 28

Achievements/ Recognitions/ Awards :

    • 4th prize for state level project exhibitionDIPEX-96 1st Prize for National Level Mini Project Competition at NIT Kozikode

    • 4.0 out og 4.0 GPA in MS (Computational Science & Engg. ) at North Carolina A&T State University NC State USA.

    • Chairman Board of Studies of Electronics Engineering at Bharati Vidyapeeth University Pune

    • Incharge Principal at Dr. D Y Patil School of Engineering Academy Ambi and Dr. D Y Patil College of Engineering Ambi

    • AICTE accreditation process in charge for year 2011-12 for DYPCOE

    • LIC visit coordinator for Oct. 2011 for DYPCOE

    • Exam. Coordinator for Nov 2011 May 2012 and Nov 2012 of DYPCOE

    • AICTE accreditation process in charge for year 2011-12 for DYPSOEA

    • Admission process coordinator for year 2012-13 for DYPSOEA

    • DTE’s ARC centre Incharge for DYPCOE

    • Head of the Department of Computer Engineering of DYPCOE

    • I had undergone Trainers Training at FIAT Torino Italy for 2 and half months. These trainers were required by FIAT to train their blue collar and white collar employees for their proposed full scale car manufacturing plant at Ranjangaon near Pune in India.

    • I have written book named Microprocessor Applications for undergraduate level Computer and Electronics students for University of Pune.

    • I have undergone two and half month training related to product and process of car manufacturing at training facility of multinational company FIAT at Torino in Italy. Hence I have an exposure to multinational company culture in Europe. During stay of two and half month in Italy I had learned Italian language useful for normal conversation.

    • At Bharati Vidyapeeth University Pune India I was in charge of Power Electronics laboratory and guided many projects in power electronics applications like dc and ac motor drives.

    • Guided several projects related to the electronic design especially VLSI design during teaching carrier of 28 years in the above mentioned engineering colleges.

    • In charge of VLSI Design Laboratory for Master of Engineering (Electronics-VLSI) course at Bharati Vidyapeeth University Pune India.

    • Coordinator of collaborative VLSI design project development. Actel Corporation USA has donated 20 FPGA kits along with their Libero IDE design tool under collaboration with Bharati Vidyapeeth University Pune India.

    • Project on the design of low noise amplifier using Cadence design tool as part of M.S. CSE course work at North Carolina A & T State University.

    • Project on the n-body simulation using parallel MPI programming and AVS scientific visualization software tool as part of M.S. CSE.

Professional Memberships :

    • Life member ISTE

Research Area :

    • Wireless Ad hoc Networks

    • Bioinfromatics: genetic sequence analysis

    • Multiresolution Signal Analysis

    • Concateneative speech synthesis

    • Image Inpaining


    • Electronics Devices & Circuits,

    • Digital Electronics & Logic Design,

    • Signal & systems,

    • Digital Signal Procssing,

    • Electromagnetics & Transmission Lines,

    • VLSI Design Technology,

    • Microcontrollers & Applications,

    • Reconfigurable Computing,

    • Analog VLSI Design,

    • Embedded System Design,

    • Wireless Networks,

    • Wireless Sensor Networks